Some computing systems, such as storage systems, include a controller board which contains a multi-processor embedded system. For example, one CPU (also referred to herein as a “server processor”) may function as a controller or server on an operating system while another CPU (referred to herein as a “host adapter processor” or “HA processor”) runs a low level and separate embedded microcode image that provides an interface to communicate with external hosts. Architected designs allow the CPUs to operate independently of each other.
When one CPU, such as the server processor, needs to load new code, it typically undergoes a “hardware reset” in order for it to reboot. Because both CPUs on the board are coupled to the same bridge, such a reset encompasses both processors, even though only one needs to reboot. Therefore, in order to load code for the server processor, both the HA processor and the server processor must be reset, taking down the path from the controller board to the host.
Moreover, many multi-processor embedded systems include two or more such controller boards, each of which contains a multi-processor embedded system. When the code for the server processors is to be updated, the boards perform the process described in the preceding paragraph one at a time to prevent both boards from being off-line simultaneously and taking down all paths to the host. Thus, after the first board completes the new code load, it performs a reset and comes back on-line. The next board then repeats the process. In a dual-board system, the paths through the first and second Host Adapters go down in succession. While there is always at least one path to the host, “ping-ponging” of path removal requires that there be a delay between loading the code on each controller board to give the host time to adjust, thereby increasing the code load time and the host must have its own code sufficiently advanced to handle the paths going down and back up again while the host may be attempting to perform normal operations, such as reading and writing to a storage unit attached to the controller boards.